【摘要】 鉴于水声信号处理系统向更大的数据量、更大的数据带宽发展现状,现有的数据处理节点无法直接接入万兆网络的情况下,提出了一种基于FPGA的万兆转SRIO的改进方案,该方案以FPGA作为核心,PowerPC作为辅助核心,通过将DDR划分多个数据通道的方式,实现万兆网络数据和SRIO数据的双向交互。该方案将2 GB容量的DDR划分为32个通道,每个通道容量动态调节,通道之间相互独立,读写通道时序要求简单。试验证明该方案系统稳定可靠,实现了DDR的32个数据通道高速读写功能。更多还原

【Abstract】 In view of the development of underwater acoustic signal processing system to a larger amount of data and larger data bandwidth,the existing data processing nodes can not directly access the 10 Gigabit network,this paper proposes an improved scheme based on FPGA,which takes FPGA as the core,PowerPC as the auxiliary core,and realizes the number of 10 Gigabit networks by dividing DDR into multiple data channels Data and SRIO data bidirectional interaction. In this scheme,the DDR with 2 GB capacity is divided into 32 channels. The capacity of each channel is dynamically adjusted. The channels are independent of each other,and the timing requirements of read and write channels are simple. The test results show that the system is stable and reliable,and the high-speed read-write function of 32 data channels of DDR is realized.更多还原