【摘要】 为了研究大规模集成电路设计中位数据在不同时钟域之间的传递问题,依据数字电路的基本理论,建立一种跨时钟域传递位数据信号的模型,并分析跨时钟域传递数据所带来的亚稳态问题及其危害性。在不同的时钟域中,保持数据同步是解决上述问题的可行方案。它能够在很大程度上减少亚稳态的传播,提高数字电路系统的可靠性。根据跨时钟域传递信号的情况,给出几种信号同步方法,并通过具体的设计方案论证该方法的正确性和可靠性。更多还原

【Abstract】 In order to solve the problem on bit data signal transfer between different clock domains for large scale integration design,a new physical model was built firstly based on the fundamental theory of digital circuit and analysist the reason the metastability was caused by a signal crossing clock domain and its damage. It is a feasible scheme to synchronize the signal crossing clock domains,which can reduce the spread of metastable states at a large extent,and improve the reliability of the digital integrated circuit system. At last,several methods on synchronizing the signal crossing clock domains for different application occasions were given in according to the conditions of the signal crossing clock domains. These methods were also demonstrated to be correct and reliable by some concrete implementation scheme.更多还原