【摘要】 大数乘法是公钥加密系统中最为核心的模块,同时,也是RSA、全同态等加密方案里最耗时的模块,因此,快速实现大数乘法是急需解决的问题。64K点有限域NTT作为大数乘法器的关键组件,文中采用并行架构实现NTT的运算,运算中基本采用加法和移位操作,以保证实现大量的并行处理,提高了处理速度。该组件在Stratix-V FPGA上得到了实现,工作在123.78 MHz频率下,运行结果表明,在FPGA上的效率是CPU上运行速度的60倍。运行结果与GMP运算库进行比较,验证了有限域64K点NTT算法的正确性。更多还原

【Abstract】 The large number multiplication unit is the most important core module in the public key encryption system,and is the most time-consuming module in RSA and fully homomorphic encryption schemes. Therefore,it is urgent for researchers to realize fast large number multiplication. A 64 K-point finite field NTT(number theoretical transform)is a key module of large number multiplier. A parallel architecture is adopted in this paper to realize the operation of the NTT. Basically,the addition and shifting operations are adopted in the operation to ensure the realization of a large number of parallel processing,which improves the processing speed. The module is implemented based on Stratix-V FPGA(field programmable gate array). The operating results show when the working frequency of the module is at 123.78 MHz,its speed when running on FPGA is 60 times higher than the speed when running on CPU. The operation results were compared with that of the GMP arithmetic library,which verified the correctness of the 64 K-point finite field NTT algorithm.更多还原