【摘要】 为测试DICE结构抗辐射静态随机存储器(Static random-access memory,SRAM)在生产制造后是否存在故障,针对DICE结构抗辐射SRAM设计存储器内建自测试电路(Memory built-in self-test,MBIST)。DICE结构SRAM不同于传统结构SRAM,由于它的存储单元结构更复杂,更多缺陷易出现在DICE结构SRAM的生产制造过程中。为了有针对性地测试出由这些缺陷导致的故障,提出了一种针对DICE结构SRAM的改进算法,此算法在March C算法的基础上仅增加了两个测试序列,使其不仅能覆盖March C算法所能覆盖的所有故障,还能覆盖DICE结构SRAM所特有的故障,提高了测试算法对DICE结构SRAM的综合故障覆盖率,在实际应用开发中,实现了对待测电路的特异性测试算法优化的目标。本算法对DICE结构SRAM设计MBIST电路,并对设计完成的MBIST电路RTL代码进行功能仿真,仿真结果证明了所设计电路的可行性和正确性,可为抗辐射SoC芯片内嵌SRAM测试提供符合工程项目开发的IP。更多还原

【Abstract】 In order to test whether there is a fault in DICE structure anti-radiation Static random-access memory(SRAM) after manufacturing, the Memory built-in self-test circuit(MBIST) for DICE structure anti-radiation SRAM is designed. DICE structure SRAM is different from traditional SRAM because of its more complex storage cell structure. More defects are easy to appear in the production and manufacturing process of DICE structure SRAM. In order to test the faults caused by these defects, an improved algorithm is proposed for DICE structure SRAM, which only adds two test sequences to the March C algorithm, so that it can not only cover all the faults covered by the March C algorithm, but also cover the unique faults of DICE structure SRAM. It can improve the comprehensive fault coverage rate of the test algorithm specifically for the characteristics of the circuit to be tested in practical development. The MBIST circuit of DICE structure SRAM is designed by using the algorithm in this paper, and the function simulation of RTL level is carried out. The simulation results show the feasibility and correctness of MBIST design. The implementation provides IP suitable for the embedded SRAM test of anti-radiation SoC chip.更多还原