【摘要】 本文根据国际篮球联会对计时器的要求和友晶科技公司的DE10_Lite的功能,提出篮球计时器的设计要求,选择方案框图;应用VHDL语言,设计顶层文件,及各底层模块。通过Quartus Prime17.1软件实现了预期的仿真波形和验证了关键设计结果;通过DE10_Lite实现了下载功能。本文为基于FPGA数字电路实验提供了思路。更多还原

【Abstract】 According to the requirements of the international basketball federation for timers and the functions of de10_lite of Youjing Technology Co., Ltd., the design requirements and scheme block diagram of a basketball timer are put forward in this paper. The top-level documents and bottom modules are designed with VHDL language. Through the Quartus prime17.1 software to achieve the expected simulation waveform and verify the key design results; through the de10_Lite to achieve the download function. This paper provides the idea of digital circuit experiment based on FPGA.更多还原