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基于总线负载的SoC自适应时钟频率调节系统
SoC Adaptive Clock Frequency Adjustment System Based on Bus Load
【摘要】 针对当前总线频率配置存在静态预设方式性能浪费高、动态调频方式调节滞后、调节粒度粗和硬件开销过大等问题,提出了一种片上系统中基于总线负载的自适应时钟频率调节系统。通过总线时钟的选择性关断和基于总线历史负载状态的负载预测技术,有效解决了上述问题。SoC的总线功耗由36.089 mW降低到19.581 mW,下降了45.74%。
【Abstract】 For the problems in current bus frequency configuration such as high waste of performance in the static preset mode, and scaling lag, coarse granularity, excessive hardware cost in the dynamic frequency modulation, an adaptive clock frequency adjustment system was proposed based on the bus load of a system-on-chip(SoC). Through selective shutdown of the bus clock and load prediction technique which was based on the historical load state of the bus, the above shortcomings were effectively solved. The power consumption of the SoC bus was reduced from 36.089 mW to 19.581 mW, which was a decrease of 45.74%.
- 【文献出处】 微电子学 ,Microelectronics , 编辑部邮箱 ,2019年02期
- 【分类号】TN405
- 【下载频次】64