【摘要】 该文针对3维FPGA (3D FPGA)芯片存在的散热问题,提出具有低热梯度特征的互连网络通道结构,力图解决传统FPGA匀称互连通道设计在芯片堆叠实现上产生的温度非平衡现象。该文建立了3D FPGA的热阻网络模型;对不同类型的通道线对3D FPGA的热分布影响进行了理论分析和热仿真;提出了垂直方向通道网络非均匀分布的3D FPGA通道结构,实验表明,与给定传统FPGA互连通道结构相比,采用所提方法实现的3D FPGA设计架构能够降低76.8%的层间最高温度梯度,10.4%的层内温度梯度。更多还原

【Abstract】 To solve the problem of heat dissipation in Three Dimensional Field Programmable Gate Array Technology(3 D FPGA), an interconnect channel architectural design method with low thermal gradient feature is proposed. A thermal resistance network model is established for the 3 D FPGA, and theoretical studies and thermal simulation experiments are carried out on the influence of different types of channels on the thermal performance of 3 D FPGA. Further, non-uniform vertical direction channel structures of 3 D FPGA are proposed. Experiments indicate that 3 D FPGA designed using the method proposed can reduce the maximum temperature gradient between different layers by 76.8% and the temperature gradient within the same layer by10.4% compared with the traditional channel structure of 3 D FPGA.更多还原