【摘要】 为了实现在轨卫星的数据的高效存储,本文设计了一种基于FPGA的NAND FLASH控制器。该控制器适配常用的异步NAND FLASH,支持对多片NAND FLASH阵列控制;支持NAND FLASH操作超时异常检测;支持对FLASH的复位、读数据、写数据、块擦除、读ID等常用功能。选用ARM公司提出的AHB总线这一高效的现场片上互连总线,设计AHB接口模块,将底层的FPGA挂接到AHB总线上。通过Cortex-M3内核向底层FPGA发送相关命令及数据,实现CPU+FPGA架构。经过仿真及上板调试,该设计性能稳定,功耗降低,达到了星上数据存储速率毫秒级的要求。更多还原

【Abstract】 In order to achieve efficient data storage in orbit satellite,this paper designs a NAND FLASH controller based on FPGA. The controller is compatible with commonly used asynchronous NAND FLASH,support for multiple NAND FLASH array;support NAND FLASH operation timeout anomaly detection;support FLASH reset,read data,program,block erase,read ID and other commonly used functions. Select AHB bus,an efficient on-chip bus proposed by ARM Company. Design the AHB interface module and mount the FPGA module to the AHB bus. Through the Cortex-M3,transfer related commands and data to the underlying FPGA and achieve CPU + FPGA architecture. By simulation and board debugging,the design performance is stable,reducing power consumption,reaching the data storage rate of millisecond requirements.更多还原