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Radio-Frequency Characteristics of Partial Dielectric Removal HR-SOI and TR-SOI Substrates

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【作者】 程实常永伟高楠董业民费璐魏星王曦

【Author】 Shi Cheng;Yong-Wei Chang;Nan Gao;Ye-Min Dong;Lu Fei;Xing Wei;Xi Wang;State Key Laboratory of Functional Materials for Informatics,Shanghai Institute of Microsystem and Information Technology,Chinese Academy of Sciences;School of Physical Science and Technology,Shanghaitech University;University of Chinese Academy of Sciences;

【机构】 State Key Laboratory of Functional Materials for Informatics,Shanghai Institute of Microsystem and Information Technology,Chinese Academy of SciencesSchool of Physical Science and Technology,Shanghaitech UniversityUniversity of Chinese Academy of Sciences

【摘要】 High-resistivity silicon-on-insulator(HR-SOI) and trap-rich high-resistivity silicon-on-insulator(TR-SOI) substrates have been widely adopted for high-performance rf integrated circuits. Radio-frequency loss and nonlinearity characteristics are measured from coplanar waveguide(CPW) transmission lines fabricated on HR-SOI and TR-SOI substrates. The patterned insulator structure is introduced to reduce loss and non-linearity characteristics. A metal-oxide-semiconductor(MOS) CPW circuit model is established to expound the mechanism of reducing the parasitic surface conductance(PSC) effect by combining the semiconductor characteristic analysis(pseudo-MOS and C-V test). The rf performance of the CPW transmission lines under dc bias supply is also compared. The TR-SOI substrate with the patterned oxide structure sample has the minimum rf loss(<0.2 dB/mm up to 10 GHz), the best non-linearity performance, and reductions of 4 dB and 10 dB are compared with the state-of-the-art TR-SOI sample’s, HD2 and HD3, respectively. It shows the potential application for integrating the two schemes to further suppress the PSC effect.

【Abstract】 High-resistivity silicon-on-insulator(HR-SOI) and trap-rich high-resistivity silicon-on-insulator(TR-SOI) substrates have been widely adopted for high-performance rf integrated circuits. Radio-frequency loss and nonlinearity characteristics are measured from coplanar waveguide(CPW) transmission lines fabricated on HR-SOI and TR-SOI substrates. The patterned insulator structure is introduced to reduce loss and non-linearity characteristics. A metal-oxide-semiconductor(MOS) CPW circuit model is established to expound the mechanism of reducing the parasitic surface conductance(PSC) effect by combining the semiconductor characteristic analysis(pseudo-MOS and C-V test). The rf performance of the CPW transmission lines under dc bias supply is also compared. The TR-SOI substrate with the patterned oxide structure sample has the minimum rf loss(<0.2 dB/mm up to 10 GHz), the best non-linearity performance, and reductions of 4 dB and 10 dB are compared with the state-of-the-art TR-SOI sample’s, HD2 and HD3, respectively. It shows the potential application for integrating the two schemes to further suppress the PSC effect.

  • 【文献出处】 Chinese Physics Letters ,中国物理快报(英文版) , 编辑部邮箱 ,2017年06期
  • 【分类号】TN40
  • 【下载频次】29
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