Aiming at the problem that existing software implementation schemes of Convolutional Neutral Network( CNN) cannot meet the requirements of computing performance and power consumption,this paper proposes a Field Programmable Gate Array( FPGA)-based accelerator for CNN. The convolution computation unit is paralled accelerated in the coarse-grained paralleled level and the whole process is fully pipelined. This optimization allows 20 multiplyaccumulations to finish in a single cycle,which greatly improves calc...