【摘要】 利用改进的完美重构方法对多A/D采样系统的时钟偏斜误差校正方法进行了FPGA实现。采用自顶向下和模块化的设计方法,实现了多路采样数据的相位同步模块、数据位置映射模块、并行多相滤波器组模块以及多路数据合成模块。对完美重构方法中的滤波器组运用多相分解技术将其化为并行结构滤波器组,对输出数据采用流水线结构加法器组进行处理,降低了系统运算延迟,提高了系统的实时性。在MATLAB和Model Sim中进行仿真,结果表明了该实现的正确性和有效性。更多还原

【Abstract】 In this paper,the clock skew error correction of multi A / D sampling system is realized by using the improved perfect reconstruction method on FPGA. Using the top-down and modular design method,phase synchronization module of multi channel sampling data,data location mapping module,parallel multi phase filter bank module and multi-channel data synthesis module are realized. For the perfect reconstruction method,the multi phase decomposition technique is used to change the filter banks to parallel structure filter bank. The output data is processed by the pipeline structure adder. It can reduce the system operation delay and improve the real-time performance of the system. The correctness and effectiveness of the implementation are shown in the simulation results of Model Sim and MATLAB.更多还原