【摘要】 结合FPGA内部资源特点,提出一种高速高阶FIR滤波器设计的改进算法。首先,分析了FIR滤波器的基本结构模型,对应的响应速率,以及占用资源情况等。其次,利用FPGA内部查找表易于实现分布式算法的特点和寄存器易于实现流水操作的特点,提出了一种在FPGA中实现高速高阶FIR滤波器的加流水操作的并行分布式算法,并且评估引入流水操作后FPGA内部的资源消耗。最后,通过ISim仿真分析响应速率,通过MATLAB仿真验证算法的可行性。更多还原

【Abstract】 Combined with the characteristics of FPGA internal resources, a modified algorithm for design of high-order and high-speed FIR filter is proposed. Firstly, the basic structure, corresponding response speed and resource consumption of the FIR filter are analyzed, then based on easy realization of the distributed algorithm by FPGA internal look-up table and pipeline operation by internal registers, a parallel distributed algorithm added with pipeline operations is proposed, thus to realize the high-order and high-speed FIR filter based on FPGA, and additionally, the FPGA internal resource consumption with introduction of pipeline operations also evaluated. Finally via Isim simulation the response speed is analyzed, and via MATLAB simulation, the feasibility of the proposed algorithm verified.更多还原