节点文献
集成电路边界扫描测试中的电路网表结构分析
Circuit Netlist Structure Analysis for Integrated Circuits Boundary Scan Testing
【摘要】 边界扫描测试能够对电路芯片间的互连和每个芯片内部的逻辑功能等进行检测,可以检测出电路中多种类型的故障,以确保电路具有较高的可靠性和电路功能的正确性。本文首先说明了边界扫描测试的结构;其次,给出了边界扫描测试软件的设计方法,对它的如下的主要模块即电路描述的输入、电路网表结构分析、完备性测试、互连测试、芯片内部功能的测试、测试结果输出等的功能进行了说明,重点对电路网表结构分析这个模块的实现进行了详细阐述。
【Abstract】 The boundary scan testing can detect the interconnections among chips and the logic functions of each chip, it is able to detect the faults in the circuits, and can ensure the high reliability and the correctness of circuit functions. First of all, the structure of boundary scan testing is demonstrated in this paper.Secondly, the design method of boundary scan testing software is given, the functions of its main modules are shown, the modules include the circuit description input, circuit netlist structure analysis, interconnection testing, chip internal logic testing and test results output, etc. The implementation of circuit netlist structure analysis is described in detail.
【Key words】 Integrated circuits; boundary scan; testing method; software program; netlist structure analysis;
- 【文献出处】 数字技术与应用 ,Digital Technology and Application , 编辑部邮箱 ,2016年07期
- 【分类号】TN407
- 【被引频次】2
- 【下载频次】52