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一种面向高性能计算的自主众核处理器结构
A homegrown many-core processor architecture for high-performance computing
【摘要】 随着半导体技术进步,众核处理器已广泛应用于高性能计算领域.近年来,在国家"863"计划、"核高基"重大专项等项目的支持下,我国高性能众核CPU的研发水平也取得了长足进步.本文介绍一种面向高性能计算的国产片上异构众核处理器结构,通过统一指令系统、统一执行模型和支持一致性的主存共享,实现异构核心的深度融合.本文主要介绍了该处理器面向"存储墙"、"功耗墙"和"可靠性墙"的优化技术体系.该处理器已完成集成了256个运算核心和4个管理核心的原型芯片设计,峰值性能超过1 TFlops.
【Abstract】 Owing to advances in semiconductor technology, many-core processors have been widely used for high-performance computing. Through the support of the national 863 program and the national major project of He Gao Ji, research and development in many-core processors has significantly progressed in China. In this paper, we present a homegrown, many-core processor architecture for high-performance computing systems. The processor is heterogeneous and supports different application features with a unified ISA architecture, a unified execution model, and a share-memory that supports cache coherence. This paper illustrates techniques for solving"memory wall", "power well", and "reliability wall" problems in the processor. The prototype chip achieved a peak performance of more than 1 TFlops with four MPEs and 256 CPEs during experimental tests.
【Key words】 many-core processor; heterogeneous chip; memory performance; power efficiency; reliability;
- 【文献出处】 中国科学:信息科学 ,Scientia Sinica(Informationis) , 编辑部邮箱 ,2015年04期
- 【分类号】TP332
- 【被引频次】22
- 【下载频次】375