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一种低静态电流瞬态增强的无电容型LDO设计

Design of a Low-Quiescent Current Capacitor-Less LDO with Transient Response Enhancement

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【作者】 池上升胡炜樊明辉许育森

【Author】 CHI Shangsheng;HU Wei;FAN Minghui;XU Yusen;Fujian Integrated Circuit Design Center,College of Physics and Information Engineering,Fuzhou University;

【机构】 福州大学物理与信息工程学院福建省集成电路设计中心

【摘要】 基于推挽式结构能提高运算放大器压摆率的特性,设计了一款静态电流低、内含推挽式AB类放大器的无电容型低压差线性稳压器(LDO)。通过优化,改善了LDO的瞬态响应性能,与传统的LDO相比,所提出的无电容型LDO的静态电流明显减小。采用SMIC 0.18μm CMOS工艺模型,利用Cadence工具对电路进行仿真验证。仿真结果表明,当输入电压为1.4~4V时,优化后LDO的输出电压为1.2 V,静态电流为5.2μA,最大负载电流达到100 mA,线性调整率为0.016%,负载调整率为0.67%,下过冲为157mV,上过冲为121mV,建立时间为1.5μs。优化后电路瞬态响应性能改善了约50%,版图面积约为0.017mm2。

【Abstract】 Based on the characteristic of push-pull configuration which can improve the slew-rate of operational amplifier,a low-quiescent current capacitor-less low dropout linear regulator(LDO)was proposed,which contained push-pull class AB amplifier.Through the optimization,the transient response performance of LDO was improved.Compared with the traditional LDO,the proposed static current of the capacitor less LDO decreased obviously.Based on the SMIC 0.18μm CMOS process,the circuit was simulated with the Cadence tools.When the input voltage was 1.4~4V,the output voltage of the optimized LDO was 1.2V,and the quiescent current was 5.2μA,the maximum load current reached to 100 mA,linear adjustment rate was 0.016%,load adjustment rate was0.67%,lower overshoot was 157 mV,overshoot was 121 mV,build time was 1.5μs.After optimization,the transient response performance improved by 50%,and the area of layout with the proposed capacitor-less LDO was0.017mm2.

【基金】 福建省科技厅重点项目(2013H0026);福建省教育厅项目(JA12029)
  • 【分类号】TM44
  • 【被引频次】10
  • 【下载频次】397
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