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一种基于FPGA进位延迟链的IGBT栅极电压米勒时延的高精度测量方法研究

Research on high resolution method for measuring Miller plateau time delay of IGBT gate voltage based on carry chain in FPGA

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【作者】 方化潮郑利兵方光荣韩立王春雷

【Author】 FANG Hua-chao;ZHENG Li-bing;FANG Guang-rong;HAN Li;WANG Chun-lei;University of Chinese Academy of Sciences;Institute of Electrical Engineering,Chinese Academy of Sciences;

【机构】 中国科学院大学中国科学院电工研究所

【摘要】 IGBT栅极电压的米勒平台时延与结温有着密切的关系,是IGBT失效的一种重要表征量,因此精确测量IGBT栅极电压米勒时延对于IGBT模块的失效监测有着重要的意义,基于此本文设计了完整的米勒时延测量系统。首先设计实现了栅极电压米勒平台的微分提取电路,将米勒平台转换为数字双脉冲,然后研究了利用FPGA内部特殊结构——进位连线组成时间内插延迟链,实现了高精度的时间内插测量。经实验验证,本文所设计的系统能够实现米勒时延亚纳秒级测量精度,为进一步定量探索IGBT模块失效与米勒时延的关系提供了保障。

【Abstract】 The Miller plateau of IGBT gate voltage,as an important precursor of failure monitoring,has a close relationship with junction temperature. As a result,the accurate measure of time delay of Miller plateau in gate voltage is vital to the online detecting of IGBT failure. A complete measurement system has been set up in this paper.Firstly,the Miller plateau was converted to double pulse by using a differential and comparator circuit based on the three-stage feature of gate voltage. Secondly,the time interval between the double pulse was measured accurately based on carry delay chain in FPGA. In this paper,a directly instantiated method of logic element( LE) was adopted to achieve a carry chain. The error caused by the metastable state problem and the key paths time delay problem were analyzed. The measurement system has achieved 500 ps precision which is verified by simulation and experiments.

【关键词】 IGBT栅极电压米勒平台FPGA进位链延迟线
【Key words】 IGBTgate voltageMiller plateauFPGAcarry chaindelay line
【基金】 国家重大科技专项-02专项“智能电网高压芯片封装与模块技术研发及产业化”资助项目(2011ZX02603)
  • 【文献出处】 电工电能新技术 ,Advanced Technology of Electrical Engineering and Energy , 编辑部邮箱 ,2015年11期
  • 【分类号】TN322.8;TN791
  • 【被引频次】5
  • 【下载频次】153
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