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PCI Express多链路的De-Skew逻辑设计
De-skew logical design in PCI Express Multi-lane
【摘要】 对于PCI Express(PCIE)多链路通道来说,发送端使用相同的时钟源同时发送数据时,通常会出现相位偏移(skew)的问题.解决链路中的相位偏移问题,能够保证所有链路中的接收端同时接收并正确处理接收到的数据,这在高速多链路串行电路中尤为重要.我们提出了一种De-skew逻辑电路,并说明了如何利用计数器来计算skew的大小、如何利用选择器控制数据是否经过缓存器,以及所组成的逻辑电路是如何消除链路中的skew;该逻辑设计已通过RTL级仿真和FPGA验证,仿真与验证的结果与预期结果完全符合,充分表明该逻辑设计能够完全解决链路的skew现象.与国外解决skew的方案对比表明,所设计的辑电路具有全面性,优越性和实用性.
【Abstract】 Skew is a common problem in multi-lane when the data is transmitted with the same clock source in the actual PCI Express. If solving the multi-lane skew problem,every channel receiver can accept and deal w ith the data correctly at the same time. So removing lane-to-lane skew is a very important function in multi-lane receiver at high-speed serial protocols. In this paper,w e propose a de-skew logical circuit,and explain how to use the counter to calculate the skew,how to use the selector to control w hether the data pass the register or not,and how the logic circuit to eliminate skew. The logic design has been verified by RTL and FPGA simulation,the measured result w ell agreed w ith the simulation and the verification result,w hich show that the logic design can completely solve the lane-to-lane skew. Compared w ith the usual solution abroad, our logic circuit possesses comprehensiveness,advantages and practicality.
- 【文献出处】 辽宁大学学报(自然科学版) ,Journal of Liaoning University(Natural Sciences Edition) , 编辑部邮箱 ,2014年01期
- 【分类号】TP336
- 【被引频次】1
- 【下载频次】38