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VLIW-Superscalar混合结构处理器分支预测结构设计
DESIGNING A BRANCH PREDICTOR ON A VLIW- SUPERSCALAR HYBRID MICROPROCESSOR
【摘要】 在一款同时支持超标量与超长指令字执行方式混合结构数字信号处理器上,为超标量结构添加分支预测功能。为控制硬件设计的复杂度,同时保证分支预测的命中率,分支预测方案使用gshare预测器。在设计完成的硬件上,运行由Open64编译器编译的Dhrystone、Coremark基准测试程序。实验结果表明,在添加分支预测功能后,处理器的性能提高30%~35%。
【Abstract】 This paper shows the way to add a branch prediction function for superscalar on a digital signal processor which supports the hybrid execution mode of both Superscalar and the VLIW. To control the complexity of the hardware design and obtain a high-enough prediction accuracy,gshare predictor is chosen for branch prediction scheme. The Dhrystone and Coremark benchmark test programs which are compiled by an Open64-based compiler have been run on the hardware to be completed the design. Experimental result shows that 30% ~35% performance improvement is obtained after the branch predictor is added.
【Key words】 Superscalar Very long instruction word(VLIW) Digital signal processor Branch prediction;
- 【文献出处】 计算机应用与软件 ,Computer Applications and Software , 编辑部邮箱 ,2014年08期
- 【分类号】TP332
- 【被引频次】1
- 【下载频次】50