【摘要】 针对复杂片上系统(So C)芯片的片上网络(No C)映射方案未考虑测试需求的问题,提出了一种面向测试优化的No C映射算法,兼顾了可测性的提升和映射开销的最小化。该映射方案首先依据特定的测试结构,使用划分算法进行片上系统所有IP核的测试分组,其优化目标为测试时间最短;之后,再基于分组内IP核之间的通信量,应用遗传算法实现No C映射,其优化目标是在测试优化的基础上实现映射开销最小。通过多个ITC’02测试基准电路进行的实验结果表明:应用该方案后,测试时间平均减少12.67%;与随机任务映射相比,映射代价平均减少24.5%。更多还原

【Abstract】 The problem of No C( Network on Chip) mapping for complex So C( System on Chip) chip is urgently needed to be solved while most of the existing mapping schemes do not considered testing requirements. This paper proposed a novel No C mapping algorithm optimized for testing, which considered the improvement of testability and the minimization of mapping cost together. Firstly, the partition algorithm was adopted to arrange all the IP cores into parallel testing groups, combined with the optimized test structure, so that the testing time was minimized. Then, based on traffic information between IP cores,genetic algorithm was applied to accomplish the No C mapping, which was aimed to the minimum mapping cost. The experimental results on ITC’02 benchmark circuits show that the testing time can be reduced by 12. 67% on average and the mapping costs decreased by 24. 5% on average compared with the random mapping.更多还原