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层次化架构嵌入式多核处理器原型设计及其编程研究
Study of prototype design of embedded multi-core processor with hierarchy and its parallel programming
【摘要】 VLSI技术进步和应用驱动使多核技术成为主流的微处理器设计技术。多核处理器作为一种时空域器件,应把超级计算机作为多核处理器的设计参考系,其主流架构将最终收敛到"小核、大阵列、层次化"上。文章利用Xilinx Virtex5-330TFPGA器件,设计实现了一款集成16个处理核的具备层次化架构特征的嵌入式多核处理器原型芯片,工作频率为90 MHz。多核处理器利用层次化的体系架构、灵活的片上互连、多种同步机制以及合理的并行程序模型,成功加载了实时视频淡入淡出(fade-in-fade-out)混叠应用(320×240,30帧/s)。基于该多核处理器架构,研究比较了粗粒度和细粒度2种并行编程模型。细粒度模型的多核同步操作稍复杂,但很好地掩盖了应用的串行操作时间,对视频淡入淡出混叠应用的加速比可达6.97。
【Abstract】 With the rapid development of very-large-scale integration(VLSI)technology,the advanced multicore architecture has become a prevalent approach to further improving the processor performance and meeting the increasing magnitude of application requirement.As the multi-core processor is the time-space domain device,its development and design technology should refer to supercomputer.So the dominating architecture of multi-core processor should obey the characteristics of small core,large array,and hierarchy.Based on this architecture,an embedded multi-core processor with hierarchy is designed,integrating 16 cores and running on Xilinx Virtex5-330 TFPGA at 90 MHz.Taking advantage of hierarchy architecture,flexible interconnection,versatile synchronization mechanism and reasonable parallel program model,this multi-core processor can accomplish real-time fade-in-fade-out processing of 4-lane video aliasing(320×240,30fps).Two parallel models for the multi-core processor are also presented,namely fine-grained and coarse-grained parallelization.Although the fine-grained parallelization program model is a little bit complex in multi-core synchronous operation,it can conceal the serial operation time well,and the multi-core processor can gain a speedup of 6.97 for fade-in-fade-out video application.
【Key words】 hierarchy; multi-core processor; FPGA device; parallel program model; video aliasing;
- 【文献出处】 合肥工业大学学报(自然科学版) ,Journal of Hefei University of Technology(Natural Science) , 编辑部邮箱 ,2014年11期
- 【分类号】TP332
- 【被引频次】3
- 【下载频次】88