【摘要】 为了满足载荷与卫星进行可靠通信的目的,设计并实现了基于FPGA和BU-65170协议芯片的1553B远程终端。自行设计了用于控制BU-65170的主控制状态机,采用16位零等待缓冲接口模式,使用单消息和双缓冲模式进行消息传输。创新性地引入RS 422总线与1553B总线进行通信,方便测试过程,结果直观可见。采用专用测试板卡Alta ECD54-1553对系统进行测试,获得预期的可靠结果。FPGA取代传统CPU来控制1553B通信并集成数据传输功能,采用Verilog HDL硬件描述语言有利于软件移植,缩短研发周期,提高系统可靠性。更多还原

【Abstract】 In order to realize reliable communication between payload and satellite platform,a 1553B remote terminal was designed based on FPGA and BU-65170.A FSM was designed to control BU-65170.The 16 bit zero latency buffering interface mode and single message/double buffering mode are adopted to transmite messages.RS-422 is used to communicate with 1553B for the convenient testing.In the test,an exclusive testing card Alta ECD54-1553 was employed,and a correct result was obtained.All of the control and data processing functions are centralized in FPGA instead of CPU.Verilog HDL is used for software transportation,R&D cycle reduction and reliability improvement.更多还原