【摘要】 基于chartered 0.35μm工艺,采用PMOS管作为输入管的折叠式共源共栅结构,设计了一种采用增益提高技术的两级运算放大器。利用Cadence公司的spectre对电路进行仿真,该电路在3.3 V电源电压下具有125.8 dB的直流开环增益,2.43 MHz的单位增益带宽,61.2°的相位裕度,96.3 dB的共模抑制比。更多还原

【Abstract】 Based on Chartered 0.35 μm process,a two-stage operational amplifier with gain boosting technology was de signed by using the PMOS transistor as the folded-cascode structure of the input tube.The circuit was simulated by Spectre made in Cadence.The circuit at 3.3 V has DC open-loop gain of 125.8 dB,unity-gain bandwidth of 2.43 MHz,phase margin of 61.2°,CMRR of 96.3 dB.更多还原