【摘要】 论文设计了一种能支持ONFI 2.1与Toggle 1.0模式的NAND Flash PHY,完成了其读写通道、地址与控制逻辑的设计,并采用读门控电路消除DQS读前后的毛刺。功能仿真与静态时序分析结果表明,PHY的设计达到了ONFI与Toggle标准时序要求。NAND Flash PHY面积为45245.5μm2,动态功耗为1.16mW,静态功耗为95.8μW。更多还原

【Abstract】 This paper proposes a NAND Flash PHY which can support both ONFI 2.1and Toggle 1.0mode.We compelete the design of read and write path,address and control logic circuits,and use read gate circuit to reduce the DQS glitches in read preamble and postamble period.The functional simulation and static timing analysis results show that the PHY design meets the ONFI and Toggle standard timing requirements.The area of NAND Flash PHY circuit is 45245.5um2.The dynamic power is 1.16mW and the static power is 95.8uW.更多还原