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主动队列管理算法的现场可编程门阵列硬件实现方案
FPGA hardware implementation scheme for AQM algorithm
【摘要】 提出了主动队列管理(AQM)算法的现场可编程门阵列(FPGA)硬件实现方案,以提高算法的执行速度和实时性,降低路由器的资源占用。编写了串口通信程序来实现FPGA与软路由器(IPCop)的数据传输,并将该实现方案应用于随机早期检验(RED)算法。实验结果表明,在硬件层面上实现了FPGA与路由器的通用通信接口以及RED算法快速、有效的拥塞控制功能,为FPGA实现其他AQM算法提供了一种有效可行的方案。
【Abstract】 The Field Programmable Gate Array(FPGA) hardware implementation scheme for Active Queue Management(AQM) algorithms was proposed in order to increase the execution speed and real-time of the algorithms,and to decrease the consumption of router resource.The serial communication programs between FPGA and the software-router IPCop were written.The scheme was applied to Random Early Detection(RED) algorithm.Test results show that the general communication interface between FPGA and the router was achieved,and the function of effective and rapid congestion control of RED algorithm was realized in the hardware level.This research provides an effective scheme for FPGA hardware implementation of the AQM algorithms.
【Key words】 automatic control; active queue management; field programmable gate array(FPGA); RED algorithm;
- 【文献出处】 吉林大学学报(工学版) ,Journal of Jilin University(Engineering and Technology Edition) , 编辑部邮箱 ,2013年02期
- 【分类号】TN791
- 【被引频次】2
- 【下载频次】92