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基于FPGA的超声探伤仪设计
Design of digital ultrasonic detector based on FPGA
【摘要】 提出了一种基于FPGA的数字超声探伤仪解决方案。该方案利用超声回波信号可重复性的特点,采用50Msps模数转换系统,通过调整超声脉冲的触发时间完成等效采样变换,实现了200Msps的高速数据采集;在超声脉冲的触发时间控制中,采用200MHz的基准时钟,以整周期方式调整触发时间,保证了触发时间的高精度。为补偿超声波信号在大声程中的传输衰减,采用AD603实现了时变增益放大器,该放大器根据数据采集的进程实时调整放大器的增益,可较好地兼顾仪器的浅层目标识别和深层缺陷探测。
【Abstract】 A design of digital ultrasonic inspecting instrument based on FPGA is discussed.In this design,based on the repeatability of ultrasonic signal,using 50 Msps ADC system,by adjusting the ultrasonic pulse triggering time to complete the equivalent sampling transform,a 200Msps high speed data acquisition is realized;in the control system of ultrasonic pulse triggering and sampling,a reference clock 200 MHz is used to guarantee the accuracy of trigger time which is adjusted in cycles.To compensate for ultrasonic echo transmission attenuation in long acoustic distance,AD603 variable gain amplifier is adopted,which is adjusted the gain according to the data acquisition process to better balance the shallow target identification and deep defect detection.
【Key words】 ultrasonic inspection; equivalent sampling; FPGA; time varying gain amplifier;
- 【文献出处】 电子测量技术 ,Electronic Measurement Technology , 编辑部邮箱 ,2013年12期
- 【分类号】TH878.2
- 【被引频次】5
- 【下载频次】183