【摘要】 基于SMIC 0.18um CMOS工艺设计了一种高速、高精度、高线性度的采样保持电路。采用全差分带增益自举电路的高增益、高带宽运放,以及改进的带衬底电压调整的栅压自举开关,有效增加输入信号带宽并减小采样保持电路的非线性。对设计的电路进行仿真,在输入信号幅值为2VP-P,频率为47.66MHz,采样频率为100MSPS时,采样保持电路建立时间为3.606ns,建立精度达0.004%,有效位数为17.2bit,无杂散动态范围达108.5dB。更多还原

【Abstract】 A high-speed,high-precision and high-linearity sample-and-hold circuit is designed in SMIC 0.18um CMOS technology.It adopted a high-gain,high-bandwidth fully differential OP-Amp with gain bootstrap circuit,and an improved gatevoltage bootstrap switch with substrate voltage adjustment,effectively increase the bandwidth of the input signal and decrease the nonlinearity of the sample-and-hold circuit.The simulation results show that when the amplitude of the input signal is 2VP-P,at the same time the frequency is 47.66MHz and the sampling frequency of 100MSPS,the setup time of the sample-andhold circuit is 3.606ns,and the setup accuracy reaches 0.0004%.The ENOB of it is 17.2bit,and the spurious-free dynamic range reaches 108.47dB.更多还原