节点文献
高精度SC PIPELINED ADC预放大锁存比较器的分析与设计
Analysis and design of preamplifier-latch comparator for high accuracy switched-capacitor pipelined ADC
【摘要】 提出了一种应用于开关电容流水线模数转换器的CMOS预放大锁存比较器。比较器采用了交叉耦合负载、PMOS/NMOS比例优化和电容中和技术。该结构大幅提高了比较器的速度并有效抑制了回馈噪声,减小了失调电压,可以作为Flash ADC应用于高精度开关电容流水线ADC。
【Abstract】 To be compatible with switched capacitor pipelined ADC,a CMOS preamplifier-latch comparator is designed and well analyzed for high speed,low kick-back noise and low mismatch offset.The cross-coupled load,capacitor neutralization and the optimizing ratio of PMOS/NMOS are adopted in the comparator.Since the proposed architecture is effective for achieving,the comparator has been used in high accuracy switched-capacitor pipelined ADC as Flash ADC.
【关键词】 预放大锁存比较器;
开关电容流水线ADC;
【Key words】 preamplifier-latch comparator; switched-capacitor pipeline ADC;
【Key words】 preamplifier-latch comparator; switched-capacitor pipeline ADC;
【基金】 厦门市科技计划项目(3502Z20093002);福建省高校产学合作科技重大项目(2010H6026)
- 【文献出处】 电子技术应用 ,Application of Electronic Technique , 编辑部邮箱 ,2012年04期
- 【分类号】TN792
- 【被引频次】3
- 【下载频次】184