【摘要】 提出了一种在FPGA中以半带滤波器为基础实现插值系统的优化结构.该结构结合半带滤波器自身特性及代数变换,降低了计算复杂度和对系数量化位宽需求,并通过使用多级插值方式降低了滤波器阶数.辅以时间换空间的串行逻辑设计思想,最大可能减少了硬件乘法器的数量.相对传统方法,该结构以极低的资源消耗,获得了很高的滤波性能.更多还原

【Abstract】 A novel interpolation architecture implemented in FPGA chip based on halfband filter is presented in this paper.This architecture,which utilizes the characteristic of halfband filter and the technique of algebraic transformation,has reduced the computation complexity and the requirement to coefficient bit wide.Meanwhile,the ways of decreasing filter order with multistage interpolation are also introduced.By considering area-speed tradeoffs,the number of multiplication elements is reduced to the least.Comparing with the traditional method,the practical design achieves expected design performance with much less logic resource usage.更多还原