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基于神经网络的数字电路串扰时滞故障测试生成

Crosstalk Delay Faults Test Generation Based on Neural Networks for Digital Circuit

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【作者】 危厚琴李艳娟曹伟

【Author】 WEI Hou-qin1,LI Yan-juan2,CAO Wei3(1.Electrical and Information Engineering College of Beihua University,Jilin 132021,China;2.College of Information and Computer Engineering of Northeast Forestry University,Harbin 150040,China;3.College of Measure-control Technology and Communication Engineering,Harbin University of Science Technology,Harbin 150040,China)

【机构】 北华大学电气信息工程学院东北林业大学信息学院哈尔滨理工大学测控技术与通讯工程学院

【摘要】 针对数字电路中多侵略线串扰时滞故障将使电路不能正常工作的问题,提出了一种有效的测试生成算法。该算法首先使用Kernighan-Lin-Fiduccia-Mattheyses(KLFM)方法在受害点处把电路分为左右2个部分,然后对右半部分电路采用神经网络算法把故障效应传播到输出端,最后对左半部分电路根据受害点时滞故障的方程计算出受害点的最大串扰时滞故障测试生成矢量。在ISCAS’85和ISCAS’89国际标准电路上的实验结果表明本算法具有较高的故障覆盖率和较短的测试生成时间。

【Abstract】 Considering that multiple aggressor crosstalk delay faults make circuit work irregularly,an effective test generation algorithm is proposed.Firstly,the circuit is cut into left and right parts with Kernighan-Lin-Fiduccia-Mattheyses(KLFM) method at victim net,then neural networks algorithm is used to propagate the fault effect to output for the right part,at last the test vectors for victim net’s maximal crosstalk delay fault can be obtained by computing victim net crosstalk delay fault equation for the left part.The experimental results on ISCAS’85 and ISCAS’89 benchmark circuits demonstrate that the algorithm has high fault coverage and short test generation time.

  • 【文献出处】 煤矿机械 ,Coal Mine Machinery , 编辑部邮箱 ,2011年03期
  • 【分类号】TN79
  • 【下载频次】43
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