【摘要】 提出一种应用Givens变换实现QR分解的脉动阵列中的边界单元和内部单元电路结构。在硬件成本增加不多的条件下,应用牛顿-拉夫逊迭代方法和查询表技术,实现了平方根倒数的快速计算。综合的电路工作时钟达100MHz,两种单元的数据处理周期均为120ns,阵列数据处理速度高于相关文献报道40%以上。更多还原

【Abstract】 New circuit structures of boundary cell and internal cell in systolic array were proposed,in which QR decomposition(QRD) was realized with Givens transform.Newton-Raphson iteration and look-up table were adopted to rapidly calculate inversed square root function with little extra hardware cost.The synthesized circuits operated at 100 MHz.Both cells had a data processing cycle of 120 ns,and the data processing speed of the circuit was about 40% higher than that in the published literature.更多还原