节点文献
一种高效率数字音频功放芯片的设计与实现
Design and Implementation of an Efficient Digital Audio Amplifier IC
【摘要】 提出了一种集合时分复用高阶数字滤波器、4阶Σ-Δ调制器,以及全对称差分调制输出的数字音频功放芯片,重点阐述了以上电路模块的实现。经测试验证,该芯片的信噪比(SNR)达到100 dB,总谐波失真加噪声(THD+N)最小达到0.07%,无闲置功耗和死区效应,实现了瓦级功率输出。
【Abstract】 A digital audio power amplifier IC was presented,which was comprised of higher-order digital filter for time division multiplexer(TDM),fourth-order Σ-Δ modulator and fully-symmetric differential modulator circuit.Implementation of these circuit blocks were described in particular.Test results showed that the digital audio amplifier IC had an SNR of 100 dB and a THD+N down to 0.07%.Without idle power and dead-zone effect,the circuit had an output power of Watt level.
【关键词】 数字音频功放;
Σ-Δ调制器;
数字滤波器;
【Key words】 Digital audio power amplifier; Σ-Δ modulator; Digital filter;
【Key words】 Digital audio power amplifier; Σ-Δ modulator; Digital filter;
- 【文献出处】 微电子学 ,Microelectronics , 编辑部邮箱 ,2011年04期
- 【分类号】TN722.75
- 【被引频次】2
- 【下载频次】90