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Physical Implementation of the Eight-Core Godson-3B Microprocessor

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【作者】 王茹范宝峡杨梁高燕萍刘动肖斌王江嵋张译夫王宏胡伟武

【Author】 Ru Wang 1,2,3,Bao-Xia Fan 1,3,Liang Yang 3,Yan-Ping Gao 1,3 Dong Liu 1,2,3,Bin Xiao 1,2,3,Jiang-Mei Wang 1,3,Yi-Fu Zhang 1,2,3 Hong Wang 1,2,3,and Wei-Wu Hu 1,3 1 Institute of Computing Technology,Chinese Academy of Sciences,Beijing 100190,China 2 Graduate School of Chinese Academy of Sciences,Beijing 100049,China 3 Loongson Technologies Corporation Limited,Beijing 100190,China

【机构】 Institute of Computing Technology,Chinese Academy of SciencesGraduate School of Chinese Academy of SciencesLoongson Technologies Corporation Limited

【摘要】 The Godson-3B processor is a powerful processor designed for high performance servers including Dawning Servers.It offers significantly improved performance over previous Godson-3 series CPUs by incorporating eight CPU cores and vector computing units.It contains 582.6 M transistors within 300 mm2 area in 65 nm technology and is implemented in parallel with full hierarchical design flows.In Godson-3B,advanced clock distribution mechanisms including GALS (Globally Asynchronous Locally Synchronous) and clock mesh are adopted to obtain an OCV tolerable clock network.Custom-designed de-skew modules are also implemented to afford further latency balance after fabrication.The power reduction of Godson-3B is maintained by MLMM (Multi Level Multi Mode) clock gating and multi-threshold-voltage cells substitution schemes.The highest frequency of Godson-3B is 1.05 GHz and the peak performance is 128 GFlops (double-precision) or 256 GFlops (single-precision) with 40 W power consumption.

【Abstract】 The Godson-3B processor is a powerful processor designed for high performance servers including Dawning Servers.It offers significantly improved performance over previous Godson-3 series CPUs by incorporating eight CPU cores and vector computing units.It contains 582.6 M transistors within 300 mm2 area in 65 nm technology and is implemented in parallel with full hierarchical design flows.In Godson-3B,advanced clock distribution mechanisms including GALS (Globally Asynchronous Locally Synchronous) and clock mesh are adopted to obtain an OCV tolerable clock network.Custom-designed de-skew modules are also implemented to afford further latency balance after fabrication.The power reduction of Godson-3B is maintained by MLMM (Multi Level Multi Mode) clock gating and multi-threshold-voltage cells substitution schemes.The highest frequency of Godson-3B is 1.05 GHz and the peak performance is 128 GFlops (double-precision) or 256 GFlops (single-precision) with 40 W power consumption.

【基金】 supported by the Important National Science and Technology Specific Projects under Grant Nos. 2009ZX01028-002-003,2009ZX01029-001-003,2010ZX01036-001-002;the National Natural Science Foundation of China under Grant Nos. 61050002,60736012,60921002,61003064
  • 【文献出处】 Journal of Computer Science & Technology ,计算机科学技术学报(英文版) , 编辑部邮箱 ,2011年03期
  • 【分类号】TP332
  • 【被引频次】2
  • 【下载频次】38
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