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一种X波段宽带快速跳频频率源

An X-Band Broadband Fast Settling Frequency Synthesizer

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【作者】 黄超任丽香毛二可何佩琨

【Author】 HUANG Chao,REN Li-xiang,MAO Er-ke,HE Pei-kun (School of Information and Electronics,Beijing Institute of Technology,Beijing 100081,China)

【机构】 北京理工大学信息与电子学院

【摘要】 针对快速跳频和低杂散的要求,提出一体化频率源设计方法,综合考虑了高速鉴频鉴相、大环路带宽设计和系统级直接数字合成(DDS)频率规划.利用这种设计方法,采用DDS激励快速锁相环(FL-PLL)结构,成功设计并实现了一种宽带快速跳频X波段频率源.实测结果表明,其输出频带为10.5~11.5 GHz;在极端1 GHz频率跳变条件下,正向跳频时间为0.42μs,负向跳频时间为0.30μs;无失真动态范围为—61.3 dBc;相位噪声为—100dBc/Hz@1kHz;最小跳频间隔为12 Hz.

【Abstract】 To achieve fast settling time and low spurs,an integrative design method is proposed, which adopts the ideas of super-high frequency phase and frequency detection,large loop bandwidth and systematic DDS frequency planning.An X-band high performance broadband frequency synthesizer with feature of ultra fast settling speed has been developed.The structure of the frequency synthesizer is direct digital synthesizer(DDS)plus fast lock phase lock loop (FL-PLL)and the output band of the frequency synthesizer is 1 GHz(from 10.5 GHz to 11.5 GHz).Test results show that,under the condition of 1 GHz frequency hopping,the developed frequency synthesizer has the following features:positive settling time is 0.42μs and the negative settling time is 0.30μs,the SFDR is-61.3 dBc,the phase noise is—100 dBc/Hz@ 1 kHz offset and the minimum frequency hopping step is 12 Hz.

【基金】 国家部委基金资助项目
  • 【文献出处】 北京理工大学学报 ,Transactions of Beijing Institute of Technology , 编辑部邮箱 ,2011年04期
  • 【分类号】TN74
  • 【被引频次】6
  • 【下载频次】189
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