节点文献
FPGA实现高速FIR滤波器设计
Achieve High-speed FIR Filter Design with FPGA
【摘要】 介绍一种FIR滤波器的FPGA实现方法,该方法以分布式算法为基本原理,详细设计了FPGA上查找表的划分、流水线结构的设计、采样及系统时序的控制等。并阐述了系统采样频率与主时钟以及系统资源消耗之间的关系。
【Abstract】 This paper describes a implementation method of the FIR filter FPGA,the basic principles of the method is a Distributed Algorithm,and detailed designs the division of the FPGA LUT,pipeline structure design,sampling and system timing control.And describes the system sampling frequency,the master clock,the consumption of system resources and the relationship between them.
【关键词】 FIR滤波器;
FPGA;
分布式算法;
流水线结构;
【Key words】 FIR filter FPGA Distributed algorithm Pipeline structure;
【Key words】 FIR filter FPGA Distributed algorithm Pipeline structure;
- 【文献出处】 中国仪器仪表 ,China Instrumentation , 编辑部邮箱 ,2010年08期
- 【分类号】TN713
- 【被引频次】1
- 【下载频次】170