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用于电源管理单元的内建可测性设计

The Design of the Build-in Testability for Power Management Unit

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【作者】 杨健徐东明张斌谢庆胜

【Author】 YANG Jian XU Dong-ming ZHANG Bin XIE Qing-sheng (Department of Communication Engineering,Xi’an University of Post and Telecommuication,Xi’an Shaanxi,710061)

【机构】 西安邮电学院通信工程系

【摘要】 电源管理单元内部集成多个LDO和Buck调整器,需要检测和控制众多的参数。本文以串并转换思想和引脚复用技术为基础,提出一种通用的内建可测性设计方法,不需要增加引脚数目,外围控制电路简单,内部测试电路规模小,可移植。芯片采用SMIC公司的0.35umCMOS混合信号模型设计,实现了内部电流比较器、电压比较器、振荡器、基准等多项指标的测量。本设计大大缩短芯片开发周期,减小芯片面积,进而降低研发成本。

【Abstract】 There are many parameters to be detected and controlled during design a PMU with many LDOs and Buck regulators.Based on the technology of serial-parallel convertor and multi-function of Pad,this paper proposed a universal design of build-in testability which does not need additional Pad , can cooperate with simple external control structures and small internal test circuit,and easy to transplant. The chip used SMIC 0.35um CMOS mixed-signal process to design,succeeded to measure the electrical characteristics of current comparator,voltage comparator,oscillator , reference and so on.The design greatly shorten the period of the chip designing,reduce the area of the chip ,and then reduce the cost of the research.

  • 【文献出处】 科技信息 ,Science & Technology Information , 编辑部邮箱 ,2010年01期
  • 【分类号】TN86
  • 【被引频次】1
  • 【下载频次】63
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