节点文献
时间数字转换(TDC)IP核设计与低功耗优化
IP Core Design of Time-to-Digital Converter and Low-power Optimization
【摘要】 时间数字转换系统用于功耗要求严格的超声波流量测控片上系统SOC(System On a Chip)。为此,提出了基于时间数字转换技术TDC(time-to-digital coversion)和时钟计数技术相结合的架构模式,并根据集成电路功耗来源与低功耗优化思路进行了门控时钟、门级电路功耗优化、多阈值电压低功耗优化。优化结果表明:以多阈值电压优化架构来降低系统级功耗,其效果比门控时钟优化的效果更为明显,功耗较优化前降低约30%,能满足本系统较严格的低功耗的设计要求。
【Abstract】 A time-to-digital conversion system is implemented based on the combination of time-to-digital conversion and clock-counter technology,which can be used in the SOC of ultrasonic heat meter ASIC.According to the analysis of the cause of IC power consumption a variety of techniques are adopted including consumption optimization of clock-gating cell,multi-threshold voltage and consumption optimization of gate-level circuit.The result shows that it is better to use multi-threshold voltage compared to the other methods with the power comsumption reduced by 30%.And the conversion system meets the design requirements of high-precision,large-range and low power consumption.
【Key words】 application specific integrated circuit; high-precision; large-range; low power; time-to-digital;
- 【文献出处】 电力系统及其自动化学报 ,Proceedings of the Chinese Society of Universities for Electric Power System and its Automation , 编辑部邮箱 ,2010年03期
- 【分类号】TN47
- 【被引频次】5
- 【下载频次】180