节点文献
高速层进式Nand Flash差错控制编码
An Accelerate-Layer-Into Error Control Coding Method for Nand Flash
【摘要】 由于加工工艺的局限性,在Nand存储器(Nand Flash)控制器设计时应具有处理存储数据出错的功能,但是还要保持一定的纠错速度.为解决该问题,在分析常用的差错控制编码(ECC)算法的基础上,提出了一种高速层进式Nand Flash纠错算法,以提高Nand Flash的读写速度;同时设计了一个可纠4位错的Nand Flash控制器.仿真结果表明,采用该编码可有效减少存储器数据纠错时间.
【Abstract】 Because of limitation of the manufacturing technique condition,a Nand Flash controller is required to handle the bits errors and to maintain the high data accessing speed.By the analysis of the error-correction code(ECC) design method,an accelerate-layer-into error control coding method is proposee to accelerate the reading and writing process for Nand Flash.A Nand Flash controller with embedded 4 bit is designed.Simulation shows that the method is effectively reduce the memory data error correction time.
【关键词】 Nand存储器;
差错控制编码;
Bose-Chaudhuri-Hocquengham;
【Key words】 Nand Flash; error control coding; Bose-Chaudhuri-Hocquengham;
【Key words】 Nand Flash; error control coding; Bose-Chaudhuri-Hocquengham;
- 【文献出处】 北京邮电大学学报 ,Journal of Beijing University of Posts and Telecommunications , 编辑部邮箱 ,2010年03期
- 【分类号】TN911.22
- 【被引频次】10
- 【下载频次】194