Design of a high-performance PJFET for the input stage of an integrated operational amplifier

【摘要】 <正>With Shockley’s approximate-channel theory and TCAD tools,a high-voltage,ultra-shallow junction PJFET for the input stage of an integrated operational amplifier（OPA） was realized.The high-performance PJFET device was developed in the Bi-FET process technology.The measured specifications are as follows.The top-gate junction depth is about 0.1μm,the gate-leakage current is less than 5 pA,the breakdown voltage is more than 80 V, and the pinch-offvoltage is optional between 0.8 and 2.0 V.The device and its Bi-FET process technology were used to design and process a high input-impedance integrated OPA.The measured results show that the OPA has a bias current of less than 50 pA,voltage noise of less than 50 nV/Hz^1/2,and current noise of less than 0.05 pA/Hz^1/2.更多还原

【Abstract】 With Shockley’s approximate-channel theory and TCAD tools,a high-voltage,ultra-shallow junction PJFET for the input stage of an integrated operational amplifier（OPA） was realized.The high-performance PJFET device was developed in the Bi-FET process technology.The measured specifications are as follows.The top-gate junction depth is about 0.1μm,the gate-leakage current is less than 5 pA,the breakdown voltage is more than 80 V, and the pinch-offvoltage is optional between 0.8 and 2.0 V.The device and its Bi-FET process technology were used to design and process a high input-impedance integrated OPA.The measured results show that the OPA has a bias current of less than 50 pA,voltage noise of less than 50 nV/Hz^1/2,and current noise of less than 0.05 pA/Hz^1/2.更多还原