【摘要】 基于UMC 0.18μm混合信号工艺,设计实现了一种具有稳定带宽的低压低功耗电荷泵型锁相环电路,参考频率32.768 kHz,输出频率范围1~50 MHz,主要为音频A/D提供采样时钟。分析了锁相环环路带宽,给出了一种稳定环路带宽的简易方法。采用低电源电压1 V,克服了低压设计的一些难点。仿真结果表明,输出频率24.576 MHz(512倍48 kHz采样)时,压控振荡器(VCO)相位噪声为-109 dBc/Hz@1 MHz补偿,总功耗180μW。初步测试结果显示,系统输出正确的频率范围。更多还原

【Abstract】 A low voltage,low power charge pump phase-locked loop with a stabilized bandwidth was designed based on the UMC 0.18 μm mixed signal CMOS technology.The reference frequency is 32.768 kHz and the output frequency is from 1 MHz to 50 MHz.It can be used as a sample clock for audio analog-digital converters.The theory of PLL bandwidth was analyzed and a easy method for bandwidth stabilize was proposed.The circuit power supply is only 1 V,this work overcomes some difficulties in low power design. The simulation shows that the VCO phase noise is-109 dBc/Hz at 1 MHz offset,and the total power dissipation is only 180 μW at 24.576 MHz(sampling rate: 512×48 kHz).The primany experiment result shows a right frequency range.更多还原