【摘要】 为了提高DSP系统的安全性能,结合AES总线加密和数据完整性检测两种安全方式,设计了一种新的安全机制.然后采用流水线技术对这种安全机制进行了硬件实现.利用Xilinx公司Virtex5系列的xc5vlx30-3ff324FPGA硬件实现结果表明,安全模块的最高频率达到230.265MHz,数据吞吐量可达7.19Gb/s,满足DSP高实时性和大数据吞吐量的应用要求.更多还原

【Abstract】 To improve the security performance of DSP system,a novel security mechanism is designed,combining two security methods:AES bus encryption and data integrity checking. Then this security mechanism is implemented on hardware with pipelining method. The results based on Xinlinx virtex-5 xc5vlx30-3ff324 FPGAs show that the Maximum Frequency is 230.265MHz and data throughput achieves up to 7.19Gb/s,which satisfy requirements for both high real-time and high data throughput of DSP.更多还原