【摘要】 本文介绍了一种利用FPGA内部的大容量Block RAM做为存储单元,以Gray码对存储单元的读写地址进行编码,从而实现高速、大容量的异步FIFO的设计方法,给出逻辑设计的综合及仿真结果;并通过工具软件Chip scope在Xilinx公司的FPGA芯片XC4VFX60上进行了实践验证,最后结果表明该异步FIFO具有写入时钟为250MHz,读取时钟为400M,宽度为8bit,存储容量可以达到16KByte,且可以避免亚稳态的出现,性能稳定等优点。更多还原

【Abstract】 (Xilinx Virtex 4) is presented, including hardware structure and some resource code. By using Gray code as address pointer of FIFO, the FIFO has high performance such as: the size of FIFO is 16KByte; the writing frequency is 250 MHz; the reading frequency is 400 MHz and it has high reliability. In the end, that result of the design can be acquired by using tool of Chip scope as watcher,and the performance can be testified.更多还原