【摘要】 本文提出了一种基于Altera公司的ASIIP核来代替Cypress公司的CY7B923实现ASI信号的发送,详细阐述了ASI IP核的实现。使用FPGA编程实现ASI接口转换与发送功能,具有更大的灵活性,且接口复合DVB-ASI接口规范。文中介绍了ASI的特点与构成,并详细阐述了使用FPGA实现ASI高速接口的硬件实现方法,最后给出了相应的测试实验。接口符合ASI接口规范,实现了高达270Mbit/s的数据传输。更多还原

【Abstract】 This paper presents a scheme to implement ASI transmitter based on Altera IP core replacing the scheme based on CY7B923 of Cypress.The method based on FPGA programming provides more flexibility and realizes the sending and receiving of Mpeg2 transport stream.It conforms to the DVB-ASI standard.The feature and the structure of ASI are first described.Then the hard ware architecture and the implementation of DVB-ASI are illustrated in detail.Finally the experimental results are presented.This scheme works with 270 megabits per second,as defined by ASI specification.更多还原