【摘要】 数字信号凭借其在传输、存储和计算上的便捷性,正在得到越来越广泛的应用。在现代数字系统中往往会存在多种采样频率,这就需要改变采样频率,进行频率转换。本文主要介绍利用现场可编程逻辑器件(FPGA)实现变采样率FIR数字滤波器的方案。首先简单分析了FIR数字滤波器的基本结构,在此基础上,以一个适用于变采样率的半带滤波器的设计为例,结合利用MATLAB为辅助设计工具,完成对给定指标的FIR滤波器的设计,最后提出了利用FPGA硬件实现滤波的TOP-DOWN结构图。此方案使性能和资源占有率得到较好的突破,最大限度的减少资源消耗。更多还原

【Abstract】 Digital signal,with its convenience of transmission,storage and calculation,is being more widely used.In modern digital system,a variety of sampling frequency will always be found,that means the sampling frequency need to change,namely frequency switching The scheme of achieving variable sampling rate FIR filter by using field programmable gate array(FPGA) was introduced in this paper.The basic structure of FIR digital filter was analyzed briefly,on this basis,with a design of variable sampling rate halfband filter as an example,and using MATLAB as aided design tool,a desired FIR filter was designed,and the TOP-DOWN struc-ture diagram of using FPGA hardware filtering was produced。This project may reduce consumed resource to a bare minimum based on improving the performance of filter and the usage of resource remarkably.更多还原