【摘要】 随着集成电路规模越来越大,系统的功能日益复杂,功能验证已成为整个设计流程的瓶颈。对于大规模的时序电路,传统基于状态空间遍历的等价性检验方法可能会遇到内存爆炸问题。为了降低等价性检验方法的复杂度,提高验证效率和处理大规模电路的能力,通常需要构造两个被验证电路的存储元素映射之间的映射关系,从而将时序电路等价性检验问题转化为组合电路等价性检验问题。较全面地介绍了时序电路等价性检验的基本方法及其研究进展,讨论了基于存储元素映射的时序电路等价检验方法的基本思想,并介绍了若干具有代表性的存储元素映射方法,展望了集成电路等价检验方法的研究发展方向。更多还原

【Abstract】 As the integrated circuit size continues to increase,the complexity of system function has become increasingly high.Functional verification has become the bottleneck of the design flow.For large sequential circuits,the traditional sequential equivalence checking based on state-space traversal of product machine potentially meets with the state explosion.In order to improve the efficiency and the scalability of equivalence checking technology,by exploiting the storage element correspondence,the sequential equivalence checking may reduce to combinational equivalence checking,which is computationally less expensive.We investigated the basic method of sequential equivalence checking,and discussed the principle of storage element mapping.Then we introduced some typical mapping algorithms.Finally,the current and future research frontiers on equivalence checking were put forward.更多还原