【摘要】 介绍了一个针对无线通讯应用的2.1 GHz低噪声放大器(LNA)的设计。该电路采用Chartered 0.25μm CMOS工艺,电源电压为2.5 V,设计中使用了多个电感,详述了设计过程并给出了优化仿真结果。模拟结果显示,该电路能提供21.63dB的正向增益(S21),功耗为12.5 mW,噪声系数为2.1 dB,1 dB压缩点为-19.054 1 dBm。芯片面积为0.8 mm×0.6 mm。测试结果达到了设计指标,一致性良好。更多还原

【Abstract】 A 2.1 GHz low noise amplifier(LNA) intended for use in wireless communication receiver,has been implemented in Chartered 0.25 μm CMOS process.The amplifier provides a forward gain(s21) of 21.63 dB with a noise figure of only 2.1 dB,while drawing 12.5 mW from a 2.5 V supply.A detailed analysis of the LNA circuit is presented in the paper,the noise figure is 2.1 dB and 1dB compress point is-19.054 1 dBm.The chip area is 0.8 mm×0.6 mm.The test results reach the design specifications and show good consistence.更多还原