节点文献
FPGA开发中一种新的OPB总线与IP核连接设计
Improved connection between OPB and IP in FPGA developing
【摘要】 基于SoC以及FPGA的编解码器,充分利用片上系统的CPU等资源,是当前业界的设计热点之一。本文以JPEG解码器为例,首先介绍了JPEG及OPB总线的相关原理,然后在传统OPB总线与IP核连接方式的基础上,在二者之间设计了一个桥接模块OPB2LOCAL Bridge,并详细说明了该设计的构架、接口及实现,并通过Verilog HDL硬件语言实现硬件设计,验证了该设计在实际工程应用系统中的有效性。
【Abstract】 System on Chip(SoC)and FPGA,which widely use on-chip resource such as CPU,is one of the hottest design in nowadays IC field.Firstly,this essay introduces relative theory of JPEG and OPB,then present the unitary structure and designation of a bridge module—OPB2-LOCAL Bridge,which is a connection between OPB and IP cores.The structure,interface and implement of this design are also introduced in detail.OPB2LOCAL Bridge is also implemented in the verilog hard description language(Verilog HDL).A simulation example is given to prove the validity of the designation in project application.
- 【文献出处】 电子测量技术 ,Electronic Measurement Technology , 编辑部邮箱 ,2009年01期
- 【分类号】TN791
- 【被引频次】4
- 【下载频次】111