节点文献
基于Min-Sum近似算法的QC-LDPC译码器
A Quasi-Cyclic LDPC Codes Decoder Based on Min-Sum Approximation Algorithm
【摘要】 由于BP算法中的非线性运算较复杂,实现中通常采用Min-Sum近似简化译码算法。针对译码过程中需要存储大量信息的问题,本文提出了一种基于Min-Sum近似算法的QC-LDPC译码器。通过重新安排Min-Sum近似算法中的运算,并将校验节点信息以一种压缩冗余的形式表示,大大减少了译码器所需的存储空间。针对QC-LDPC码校验矩阵准循环的特性,译码过程中以块为单位对信息进行更新,且可以实现多种消息传递调度策略。为进一步减少存储空间,对变量节点信息采用了非线性量化,根据密度演进理论对量化规则进行了优化。
【Abstract】 Due to the complex nonlinear computation in BP algorithm,min-sum approximation is often used to simplify the decoding of LDPC codes.This paper presents a quasi-cyclic LDPC decoder based on min-sum approximation algorithm.By reformulating the min-sum approximation algorithm and storing the check nodes messages in a compressed format,the memory usage of decoder is reduced significantly.According to the quasi-cyclic structure of parity-check matrix,the messages are updated by block in decoding.So that different message passing scheduling can be realized.To further reduce the memory usage,non-linear quantization is used to represent the variable nodes messages.The quantization scheme is optimized by density evolution.
【Key words】 decoder; quasi-cyclic LDPC codes; min-sum approximation; message passing scheduling;
- 【文献出处】 无线通信技术 ,Wireless Communication Technology , 编辑部邮箱 ,2008年01期
- 【分类号】TN764
- 【被引频次】5
- 【下载频次】278