【摘要】 从时分复接系统对位同步系统的性能要求出发,提出了一种基于FPGA的快速位同步系统的设计方案,给出了位同步系统的实验仿真,结果表明该系统有较快的位同步建立时间,节省了FPGA的耗用资源,系统工作稳定、可靠。更多还原

【Abstract】 According to the performance requirement of bit synchronization in Time Division Multiplexer system,the paper proposed a method to design fast bit synchronization system based on FPGA. The imitation and experiment of bit synchronization system were given,experiment result shows,the system can build synchronization quickly,the circuit work stably and reliable.更多还原