【摘要】 介绍了一种用于指纹识别专用集成电路(ASIC)的乘法器模块的设计。该乘法器模块能够处理32位的有符号数、无符号数的乘法和乘加运算。电路采用基-4的Booth编码以及改进型压缩器阵列结构。采用提出的迭代和阵列结合的结构算法,可节省芯片面积30%,提高工作频率24%。模块电路在TSMC0.25μm工艺上实现。该乘法器模块易于移植到其他数字处理系统。更多还原

【Abstract】 A multiplier module for fingerprint identification ASIC was designed, which was capable of handling signed/unsigned 32-bit multiplication and 32-bit MAC by using an additional sign-bit.In this circuit, radix-4 booth encode and an improved compression array architecture were adopted.The new algorithm architecture with iteration and array improved system performance by 30% and reduced chip area by 24%.Implemented in TSMC’s 0.25 μm CMOS technology, the multiplier module could be easily modified for other DSP systems.更多还原