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一种高性能QAM解调器的设计与实现
Design and implementation of high-performance DVB-C demodulator
【摘要】 提出了一种适用于DVB-C标准的高性能QAM解调器。通过采用改进的解调算法并优化其VLSI实现结构,该设计在现场测试中不仅取得良好的性能并且节约了硬件资源。该解调器支持4/16/32/64/128/256QAM六种调制模式,符号率1~7MSps范围内连续可调,具有高灵敏度以及可捕获最大达±700kHz的载波频偏。实现结果表明该文设计的解调器非常适合于低成本的有线电缆系统。
【Abstract】 A high-performance DVB-C Quadrature Amplitude Modulation(QAM) demodulator has been presented.By adopting optimal demodulation algorithm and optimizing VLSI implementation architecture,this demodulator achieves high performance at low hardware costs.It supports 4/16/32/64/128/256QAM constellations with symbol rate ranging from 1 MSps to 7 MSps.The demodulator features large carrier offset acquisition range(±700 kHz) and high sensitivity.Experimental results demonstrate the robustness of the proposed demodulator.
【关键词】 QAM解调器;
VLSI实现;
载波恢复;
自适应均衡;
【Key words】 QAM demodulator; VLSI implementation; carrier recovery; adaptive equalization;
【Key words】 QAM demodulator; VLSI implementation; carrier recovery; adaptive equalization;
- 【文献出处】 计算机工程与应用 ,Computer Engineering and Applications , 编辑部邮箱 ,2008年12期
- 【分类号】TN763
- 【被引频次】5
- 【下载频次】334